Cambricon Technologies is preparing one of the most aggressive production ramp-ups attempted by a Chinese AI chipmaker. According to figures reported by Bloomberg, the company aims to deliver around 500,000 AI accelerators in 2026, including as many as 300,000 units of its Siyuan 590 and 690 processors.
These numbers, which would more than triple Cambricon’s 2025 output, come at a time when Chinese companies are reworking their hardware roadmaps in response to U.S. export controls and general geopolitical uncertainty. It also brings the limits of China’s current semiconductor manufacturing capabilities to the surface, which will play as large a role in market demand in determining what Cambricon can successfully ship.
The Siyuan line has become the company’s flagship portfolio for training and inference. Cambricon already counts ByteDance as its largest customer and is expected to expand engagements with Alibaba as these firms scale their domestic AI clusters.
That shift is being shaped partly by domestic policy, with Chinese officials having spent much of the last few months urging major buyers to reduce their reliance on Nvidia hardware. That has created an opening for Cambricon and fellow domestic suppliers.
Foundry constraints
(Image credit: Intel)
Having ambition is all well and good, but keep in mind that Cambricon doesn’t manufacture its own silicon. It depends on SMIC’s N+2 (7nm) processes for the Siyuan 590 and 690, the company’s most advanced production line that’s built entirely around DUV lithography rather than the EUV systems used by TSMC and Samsung. While N+2 can produce some pretty complex chips, it does so with a significant overhead in multi-patterning tests that raise cost and constrain performance.
This becomes apparent when you look at the numbers; Bloomberg reported yield rates of roughly 20% for Cambricon’s largest dies. That translates to four out of five chips coming off the wafer not meeting the targeted criteria, such as the chip having a defect or not meeting frequency or voltage targets (among other criteria). While some of those die could potentially be harvested for lower-power or lesser products, this yield level falls below most industry benchmarks. For instance, TSMC’s 2nm process has shown yields beyond 60% in test runs. Cambricon is therefore attempting to scale volume on a node that is both older and materially less efficient, so even if SMIC allocates more capacity, the proportion of chips that survive the manufacturing process will define the effective output.
Competition for those wafers adds another layer. Huawei, whose Ascend accelerators now form the backbone of many in-country training clusters, also relies on SMIC for advanced production. Demand for smartphone SoCs built on the same family of nodes has risen since Huawei’s return to 5G handsets. Any increase in Cambricon’s allocation requires SMIC to rebalance commitments across several strategically important customers, so the half-million-unit target for 2026 hints at strong confidence inside Cambricon that it can secure those slots. Ultimately, the foundry’s capacity and yields will determine what any ramp-up looks like in practice.
Memory supply is another challenge
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