Kioxia will produce its next-generation BICS9 and BICS10 3D NAND memory next year, but will use different fab sites for different types of flash, according to Nikkei. BiCS10 transitions to an all-new 332-layer 3D NAND array to address high-capacity solutions for AI and hyperscalers.
Perhaps the biggest surprise about 332-layer BiCS10 is that Kioxia (and Sandisk) is pulling in production of this type of memory to 2026, if the Nikkei report is correct. The publication states that both companies initially planned to produce BiCS10 memory in the second half of 2027. However, demand from the AI, cloud, and enterprise sectors likely prompted Kioxia to begin production ahead of schedule for its most advanced memory announced to date.
While both BICS9 and BICS10 use the CBA (CMOS directly Bonded to Array) architecture and boast a 4.8 GT/s Toggle DDR 6.0 interface, BICS9 uses a smaller 218-layer 3D NAND array to target performance-hungry low-power applications.
Different fabs for different memory
As noted above, Kioxia (and therefore Sandisk) will use different fab sites to make BiCS9 and BiCS10 3D NAND. Specifically, the newest Fab 2 near Kitakami, Iwate prefecture, will become the base for making high-capacity 332-layer BiCS10 NAND, whereas the established complex near Yokkaichi in Japan's Mie prefecture will remain the center for 218-layer BiCS9 3D NAND.
The decision to produce flagship BiCS10 devices at Fab 2 in Iwate Prefecture makes a lot of sense, as the site has the latest equipment, even though Kioxia's R&D center is in Yokkaichi. However, the fabs in Yokkaichi are still good enough (and largely depreciated) for BiCS9, will address mainstream devices, and must be cost-effective to manufacture.
Keep in mind that the information is largely unofficial and unconfirmed by Kioxia and Sandisk; many details are subject to change ahead of an official announcement.
CBA: The key to next-generation 3D NAND
Developing high-speed memory interfaces for 3D NAND is challenging, so leading flash memory suppliers have taken a page from Yangtze Memory's playbook. Companies have begun producing memory arrays and peripheral CMOS logic responsible for memory operations on separate layers. These are then attached together using hybrid-bonding techniques. Kioxia and Samsung call their architecture CMOS Directly Bonded to Array (CBA) and have been deploying the technique since BiCS8 3D NAND, which started production in the second half of 2024.
Fig.1 (a) Floorplan image, (b) Peel-back view of the CBA chip ©2025 IEEE (Image credit: Kioxia)
... continue reading