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Igniting the GPU: From Kernel Plumbing to 3D Rendering on RISC-V

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How I enabled the PowerVR GPU on the TH1520 SoC by writing the missing kernel drivers.

Introduction: Enabling the Hardware#

For years, PowerVR GPUs ubiquitous in the embedded world relied entirely on out of tree vendor drivers (often named pvrsrvkm ). While source code was provided in Board Support Packages, these drivers were never accepted into the mainline kernel due to their non standard architecture.

That changed when Imagination Technologies announced their commitment to an upstream, open source driver. The resulting drm/imagination driver has been upstream for some time, but it wasn’t usable on RISC-V platforms like the T-HEAD TH1520 (used in the Lichee Pi 4A).

This marks a significant milestone: with the enablement work described below, the TH1520 becomes the first RISC-V SoC to feature fully mainline, hardware accelerated 3D graphics support.

This effort has followed a long road of development, generating significant community interest along the way from the initial driver support discussions to the power sequencing challenges, and finally culminating in the official upstream merge in Linux 6.18.

While the GPU driver itself is generic, the hardware surrounding the GPU on this SoC specifically the power, clock, and reset controllers required significant enablement work before the GPU could actually be probed.

This post details the architectural “plumbing” required to bring up the full graphics stack on the TH1520. This involved implementing the necessary platform drivers to handle the SoC’s power sequencing, enabling the mainline drm/imagination driver for RISC-V, and validating the stack with a modern, Vulkan based userspace.

Part 1: The Dependency Chain#

Enabling the GPU wasn’t just a matter of changing a Kconfig entry. The TH1520 GPU subsystem is gated behind a chain of hardware dependencies that had no existing Linux drivers.

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