ChangXin Memory Technologies (CXMT), the leader of the Chinese DRAM industry, is on track to build 3rd Generation high bandwidth memory (HBM3), according to Chosun Biz. Moreover, China-based Naura Technology, Maxwell, and U-Preseason are developing domestic tools specifically designed to assemble HBM memory stacks. If true, this means that in several years, China will have fully localized the production of HBM, which is crucial in the race to produce high-end AI accelerators, with Chinese companies under pressure to utilize homegrown silicon.
Built in China
Having started mass production of DDR5 and LPDDR5 memory, CXMT, China's largest and most advanced DRAM maker, plans to begin mass production of HBM3 this year. In parallel with preparing for volume production, CXMT has reportedly already supplied HBM samples to Chinese AI hardware developers, including Huawei, which is a surprise as Huawei's Ascend 950-series AI accelerators are set to rely on proprietary HiBL 1.0 and HiZQ 2.0 types of memory, not HBM3. Nonetheless, sampling of CXMT's HBM3 stacks indicates that the technology has reached a level of maturity suitable for customer evaluation and early integration.
(Image credit: CXMT)
For CXMT, HBM3 is a strategically important product for many reasons. First up, HBM is significantly more expensive than the 'commodity' DRAM that CXMT has produced so far, so entering a new market will affect CXMT's bottom line. Secondly, the availability of high-performance HBM3 is strategically important for China's AI sector. Thirdly, producing HBM3 stacks — that consist of eight or more large DRAMs with a wide I/O — will prove that CXMT is a world-class memory maker on par with Micron, Samsung, and SK hynix. Last but not least, making large HBM3 DRAM devices — which are three or four times larger than commodity DDR5 or LPDDR5 — consumes a lot of capacity. If CXMT manages to produce HBM3 in high volumes, it will need to demonstrate that it has enough capacity to address all segments of the market.
CXMT is not the only company in China to be working on HBM projects. Around two years ago Wuhan Xinxin Semiconductor Manufacturing (XMC), a foundry controlled by Yangtze Memory Technology Co. (YMTC), China's leading maker of 3D NAND, initiated a project to develop its own HBM packaging technologies using hybrid bonding and other IP from YMTC, and bought the appropriate equipment to reach a monthly production capacity of around 3,000 wafers.
XMC is also still working on its through-silicon via (TSV) process technology used in HBM, according to the report, but precise details, such as the exact development stages, remain unclear. Once XMC is done with development, it can offer integration services to DRAM makers or other interested parties.
Still, while a significant number of HBM characteristics — including performance efficiency and thermals — depend on packaging and hybrid-bond quality, XMC/YMTC will still need special HBM DRAM chips, which they will only be able to get from DRAM suppliers. We are not aware whether Chinese entities can access HBM DRAM ICs from foreign companies. If they cannot, then XMC/YMTC will have to assemble HBM modules based on memory devices made in China by companies like CXMT.
Building enough HBM for AI accelerators locally is one of the hardest challenges for the Chinese semiconductor industry, as the sector is in pursuit of two goals simultaneously. One of them is to reduce reliance on chips made abroad, so Chinese chipmakers must increase their output at all costs. Another is to reduce the country's reliance on export-controlled chipmaking tools, such as ASML's lithography machines. Therefore, China will need to develop competitive alternatives (or upgrade existing equipment) to be competitive with global rivals.
The U.S. export controls already limit multiple types of lithography and deposition tools to Chinese entities, with severely limited access to the advanced manufacturing tools required for the development and production of HBM. Consequently, China's HBM ambitions increasingly hinge on the rapid localization of etching, TSV, bonding, and packaging equipment rather than on memory design alone.
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