Rumors have it that the forthcoming higher-end M5 Pro and M5 Max processors will be architected differently than the M5, presumably to improve scalability. They are expected to debut in the next wave of MacBook Pros.
This change in architecture would mean it would be easier and more efficient to speed up the chips, as well as to decrease heat generation and possibly bump battery life a bit. To achieve this feat, the word is Apple has switched from TSMC's system-on-chip layout used by the M5 to a custom variation of TSMC's system-on-integrated-chip, molding-horizontal layout, called SoIC-MH.
What's changed?
With the SoC architecture Apple uses for its M5, everything but the memory is fabricated wholesale on a single die, which is connected to system memory for a chip. The company has essentially been scaling to its Pro, Max and Ultra chips by combining multiple dies.
That's why, for example, the GPU core counts on the Max and Ultra chips have generally been doubles of the two lower-end versions. But that's always been a rather inefficient and inflexible way to scale performance.
TSMC's SoIC fabrication creates separate dies (or chiplets) for selected operational groups, which are then linked via tiny high-speed connections into a single package and combined with memory for the final chip.
In Apple's case, the expectation is that it will be moving the GPU to its own chiplet to make it easier to scale its performance independent of the CPU. This is essential since demand for tensor (for AI) and graphics processing power is growing rapidly, while the need for high-powered CPUs is a lot less at the moment.
SoICs generally have stacked chiplets, which allows for the tiniest and, therefore, fastest possible interconnects. But Apple may be using a custom SoIC-MH layout, where they're laid out next to the main die rather than stacked.
A potentially critical step
In the absence of any solid information, it's hard to predict how much of an effect this would have on performance.
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