“A trillion transistors” sounds like hyperbole, until it’s not. Designing today’s leading-edge transistors resembles expanding a structure that never stops growing. Chiplets are bolted on as packaging stacks everything vertically, and elements like power delivery and interconnects get re-routed each time footprints change. Eventually, the challenge of designing the actual blueprint is taken over by coordinating everything that connects to it.
That coordination is what Cadence is targeting with what it calls its new ChipStack AI Super Agent. Announced February 10, the system embeds an AI-driven assistant across Cadence’s electronic and design automation portfolio, with the stated aim of helping engineers design, debug, verify, and sign off complex semiconductor projects more efficiently.
“We’re easily going to get over a trillion transistors… in the package, by the end of the decade,” Cadence Senior Vice President Paul Cunningham said in remarks to Bloomberg. “It’s a phenomenal increase in complexity.”
Emphasis on packaging
(Image credit: Intel)
Cunningham’s emphasis on “in the package” is significant because growth to a trillion transistors is not simply about shrinking features at advanced nodes, but assembling multiple dies into unified systems through chiplets, 2.3D interposers, and 3D stacking. And as architectural ambition shifts upward, so too does the burden on design orchestration.
EDA has long since automated the mechanics of design, with synthesis, placement, routing, timing analysis, and verification all deeply algorithmic processes that run on large compute clusters. Multi-die packages introduce additional interconnect domains and power islands, push timing closure across die-to-die links, and require thermal modeling across stacked silicon. Verification is therefore no longer isolated to block correctness but extends to system-level interaction between heterogeneous components.
Engineers manage these interactions through layered tool flows, scripts, constraints, and sign-off checks, but reports can easily stretch into thousands of lines, and debug cycles can take weeks. Cadence’s Super Agent sits above that orchestration layer, acting as what the company describes as a domain-trained AI system built on a “mental model” of chip design rather than a general-purpose large language model. Engineers can interact with the tool stack conversationally, requesting actions without navigating every script or endless menus.
“You can chat with all of the Cadence products, and they’ll talk back to you,” he said. “You don’t need to be the ultimate scripting expert. You don’t need to know all of the fancy features and tool clicks of our graphic user interfaces. You can just say, ‘Hey, look. This is what I want to do.’”
Labor constraints
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