Key Takeaways
New approaches are being devised and tested to address the talent shortage.
Leveraging AI in design tools will help engineers become more efficient, and potentially could reduce the time it takes to train engineering students.
EDA companies are looking at whether it’s possible to train computer science and software engineers to become hardware engineers.
A variety of new approaches are being developed and tested to address the talent shortage in the chip industry, from wider deployment of AI tools to cross-training engineers graduates outside of their core study area.
On the AI front, new tools can pick up some of the slack by helping engineers design and verify semiconductor hardware more efficiently. Large language models and natural language agentic AI tools can be trained to serve as customized assistants. This technology will continue to develop, morph, and overlap in a cycle, as more advanced chips are needed to power the AI being used to help design the chips.
Academia, meanwhile, is experimenting with a variety of different approaches to fill the talent gap, from shorter and more intensive training and cross-training, to using machine learning tools, large language models, multi-agentic, and mix-of-experts AI to train software engineers to do the job of hardware engineers. Teaching software engineers how to design hardware could be possible, but it is not easy.
“There would still need to be some education, some job training,” said Matthew Graham, senior group director, verification software product management at Cadence. “There has to be some fundamental understanding of what the AI is doing, or any solution is doing, to interact with it. But would those people need to be experts in writing RTL? No. Maybe chip developers will no longer need to learn how SystemVerilog works or how VHDL works. Or they’ll have some fundamental understanding, in the same way that people writing C programs, or C++, or Python, or any one of the thousand languages that are out there. They all fundamentally understand that the compiler creates assembly code and machine code. They don’t actually do it. They don’t have to do it. And they don’t really have to be good at it. They just have to fundamentally understand that when they write this code, these things happen under the hood.”
In the future, chip developers and verification engineers will have different skills from those that engineers have today. “It will be closer to what a software engineer does,” said Graham. “If we go back 25 years when I started my career, I was doing IC development and very quickly became a verification engineer because I learned object-oriented programming. It was one of the first classes of electrical engineers in which object-oriented programming was part of not only the computer engineering curriculum, but also the electrical engineering curriculum. When the predecessors of SystemVerilog came along — Specman e and Vera — they said, all these hardware engineers that are writing RTL, none of them have any idea how to use this technology. So you, Mr. Electrical Engineer, who happens to have a few classes in software engineering, can now become a verification engineer, because that’s the skill we need. The same thing is going to happen. There is going to be an additional software component. Will we exclusively take software engineers and not train them at all, and they’ll be able to generate hardware? I doubt it. There’s still some specific domain knowledge that’s required.”
Traditional hardware design, especially at the RTL or circuit level, requires a deep understanding of digital logic, timing, verification, and often analog concepts. “The toolchains and workflows are typically more complex and less abstracted than most software environments,” said Anand Thiruvengadam, senior director of product management at Synopsys. “Hardware development involves considerations like physical constraints, synthesis, timing closure, and manufacturing processes, which are not usually part of a software engineer’s background.”
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