Scheduling on Hybrid CPUs
Contact: OlivierCertner
Motivation
For the amd64 architecture, Intel started shipping hybrid CPUs with the rather confidential Lakefield and then more massively with Alder Lake (Gen12). Apart from some models of Alder Lake, it is now impossible to buy an Intel chip that does not have at least P (Performance) and E (Efficiency) cores.
ARM first released incarnations of its big.LITTLE arrangement as soon as 2011. DynamIQ is an evolution where big and LITTLE CPUs can be grouped into a single cluster (in particular, sharing L3 cache), offering more flexibility for task migration.
See the Wikipedia page on Heterogeneous Computing.
Scope
Make the scheduler (ULE) aware of CPUs having cores with a different performance/energy mix.
Implement policies to steer scheduling decisions as the user/admin sees fit, with different possible goals (e.g., max performance, energy savings, latency, etc.).
First, target amd64/Intel.
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