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91.
ZeroRISC Gets $10M Funding, Says Open-Source Silicon Security Inevitable (news.ycombinator.com)
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RISC-V in AI and HPC Part 1: Per Aspera Ad Astra? (news.ycombinator.com)
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Former Intel engineers form AheadComputing to break CPU performance limits with RISC-V design (techspot.com)
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