GoKawiil - Latest Tech News & Aggregated Headlines

Condor Technology to Fly "Cuzco" RISC-V CPU into the Datacenter

news.ycombinator.com Jeffrey Burt 2025-09-17 03:48:01

Once a hyperscaler or a cloud builder gets big enough, it can afford to design custom compute engines that more precisely match its needs. It is not clear that the companies that make custom CPUs and XPUs are saving money, but they are certainly gaining control and that is worth something. Arm made a push based on the power-efficient nature its architecture, and Nvidia has become a key player in AI with its powerful GPUs and now its “Grace” Arm server CPUs. A reinvigorated AMD has given system

Topics: architecture instruction risc said time

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WASM 3.0 Completed

news.ycombinator.com Unknown 2025-09-20 06:16:53

Published on September 17, 2025 by Andreas Rossberg. Three years ago, version 2.0 of the Wasm standard was (essentially) finished, which brought a number of new features, such as vector instructions, bulk memory operations, multiple return values, and simple reference types. In the meantime, the Wasm W3C Community Group and Working Group have not been lazy. Today, we are happy to announce the release of Wasm 3.0 as the new “live” standard. This is a substantially larger update: several big fe

Topics: deterministic exception instructions new wasm

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I got the highest score on ARC-AGI again swapping Python for English

news.ycombinator.com Jeremy Berman 2025-09-21 20:53:47

I think ARC-AGI is still the most important benchmark we have today. It’s surprising that LLMs can win the math olympiad but struggle with simple puzzles that humans can solve easily. This highlights a core limitation of current LLMs: they struggle to reason about things they weren't trained on. They struggle to generalize. But they are getting better, fast. Last December, I got first place on ARC-AGI v1 with a score of 53.6%. A lot has changed since then. Thinking models had just come out and

Topics: agi arc humans instructions reasoning

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Show HN: MCP Server Installation Instructions Generator

news.ycombinator.com Unknown 2025-09-25 04:33:14

This project was originally created to serve html requests for users who tried to access a mcp url that was secured by the hyprmcp/mcp-gateway in the browser. Checkout the installation instructions for this hosted mcp server here: https://demo.hyprmcp.cloud/mcp-install-instructions-generator/mcp How To Install a Remote MCP server? Instructing users on how to install an MCP server is hard, because configuration is different for each client. If this has been your experience hosting an MCP server

Topics: install instructions mcp server users

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Interesting PEZY-SC4s

news.ycombinator.com Chester Lam 2025-09-29 20:15:28

Japan has a long history of building domestic supercomputer architectures dating back to the 1980s. PEZY Computing is one player in Japan’s supercomputing scene alongside Fujitsu and NEC, and has taken several spots in the Green500 list. RIKEN’s Exascaler-1.4 used PEZY-SC chips to take first place in Green500’s November 2015 rankings. More recently, PEZY-SC3 placed 12th on Green500’s November 2021 list. PEZY presented their newest architecture, PEZY-SC4S, at Hot Chips 2025. While the physical pr

Topics: cache instruction pezy sc3 sc4s

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Memory is slow, Disk is fast – Part 1

news.ycombinator.com Unknown 2025-10-12 11:50:01

TL;DR Hardware got wider, not faster. More cores, more bandwidth, huge vector units — but clocks, IPC, and latency flatlined. Old rules like “memory is faster than disk” are breaking. To go fast today, you have to play the new game. “CPUs keep getting faster every generation” Over the past 20 years or so computer hardware has evolved such that some facts we “know” about computers are wrong. Even among computer scientists, or perhaps especially among computer scientists, intuitions are off tar

Topics: bandwidth faster instructions latency memory

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Intel Patents 'Software Defined Supercore'

news.ycombinator.com Anton Shilov 2025-10-18 23:44:56

Intel has patented a technology it calls 'Software Defined Supercore' (SDC) that enables software to fuse the capabilities of multiple cores to assemble a virtual ultra-wide 'supercore' capable of improving single-thread performance, provided that it has enough parallel work. If the technology works as it is designed to, then Intel's future CPUs could offer faster single-thread performance in select applications that can use SDC. For now, this is just a patent which may or may not become a reali

Topics: core cores instructions performance single

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How is Ultrassembler so fast?

news.ycombinator.com Unknown 2025-10-19 01:42:43

How is Ultrassembler so fast? Ultrassembler is a superfast and complete RISC-V assembler library that I'm writing as a component of the bigger Chata signal processing project. Assemblers take in a platform-dependent assembly language and output that platform's native machine code which runs directly on the processor. "Why would you want to do this?" you might ask. First, existing RISC-V assemblers that conform the the entirety of the specification, as and llvm-mc , ship as binaries that you r

Topics: code inst instructions memory return

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Condor's Cuzco RISC-V Core at Hot Chips 2025

news.ycombinator.com Chester Lam 2025-10-18 23:18:41

Condor Computing, a subsidiary of Andes Technology that creates licensable RISC-V cores, has a business model with parallels to Arm (the company) and SiFive. Andes formed Condor in 2023, so Condor is a relatively young player on the RISC-V scene. However, Andes does have RISC-V design experience prior to Condor’s formation with a few RISC-V cores under their belt from years past. Condor is presenting their Cuzco core at Hot Chips 2025. This core is a heavyweight within the RISC-V scene, with wi

Topics: core cuzco cycle execution instruction

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Emulating aarch64 in software using JIT compilation and Rust

news.ycombinator.com Unknown 2025-10-14 21:58:02

Emulating aarch64 in software using JIT compilation and Rust by Manos Pitsidianakis on 2025-08-25 I was able to write a simple just-in-time compiled emulator for the aarch64 ISA (Arm A-profile A64 Instruction Set Architecture). The Armv8-A/Armv9-A specs are massive in size, so the initial scope is for basic functionality and almost no optional architectural features such as SIMD. I wrote the emulator as an exercise in understanding how QEMU’s TCG (Tiny Code Generator) software emulation works

Topics: entry gdb instruction let memory

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Expert: LSP for Elixir

news.ycombinator.com Unknown 2025-10-21 00:36:36

Expert Expert is the official language server implementation for the Elixir programming language. Installation You can download Expert from the releases page for your operating system and architecture. Put the executable somewhere on your $PATH , like ~/.local/bin/expert For editor specific installation instructions, please refer to the Installation Instructions Nightly Builds If you want to try out the latest features, you can download a nightly build. Using the GH CLI, you can run the f

Topics: build download expert installation instructions

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Performance Speed Limits (2019)

news.ycombinator.com Travis Downs 2025-10-18 01:06:10

How fast can it go? Sometimes you just want to know how fast your code can go, without benchmarking it. Sometimes you have benchmarked it and want to know how close you are to the maximum speed. Often you just need to know what the current limiting factor is, to guide your optimization decisions. Well this post is about that determining that speed limit. It’s not a comprehensive performance evaluation methodology, but for many small pieces of code it will work very well. Table of Contents Th

Topics: cycle instructions limit load loads

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How to slow down a program and why it can be useful

news.ycombinator.com Unknown 2025-10-24 09:38:35

Most research on programming language performance asks a variation of a single question: how can we make some specific program faster? Sometimes we may even investigate how we can use less memory. This means a lot of research focuses solely on reducing the amount of resources needed to achieve some computational goal. So, why on earth might we be interested in slowing down programs then? Slowing Down Programs is Surprisingly Useful! Making programs slower can be useful to find race conditions

Topics: basic instructions mov nop slowdown

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Slowing down programs is surprisingly useful

news.ycombinator.com Unknown 2025-10-25 10:38:35

Most research on programming language performance asks a variation of a single question: how can we make some specific program faster? Sometimes we may even investigate how we can use less memory. This means a lot of research focuses solely on reducing the amount of resources needed to achieve some computational goal. So, why on earth might we be interested in slowing down programs then? Slowing Down Programs is Surprisingly Useful! Making programs slower can be useful to find race conditions

Topics: basic instructions mov nop slowdown

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How to Slow Down a Program? and Why It Can Be Useful

news.ycombinator.com Unknown 2025-10-25 15:38:35

Most research on programming language performance asks a variation of a single question: how can we make some specific program faster? Sometimes we may even investigate how we can use less memory. This means a lot of research focuses solely on reducing the amount of resources needed to achieve some computational goal. So, why on earth might we be interested in slowing down programs then? Slowing Down Programs is Surprisingly Useful! Making programs slower can be useful to find race conditions

Topics: basic instructions mov nop slowdown

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Agentic Browser Security: Indirect Prompt Injection in Perplexity Comet

news.ycombinator.com Unknown 2025-10-30 04:52:08

This is the first post in a series about security and privacy challenges in agentic browsers. This vulnerability research was conducted by Artem Chaikin (Senior Mobile Security Engineer), and was written by Artem and Shivan Kaul Sahib (VP, Privacy and Security). The threat of instruction injection At Brave, we’re developing the ability for our in-browser AI assistant Leo to browse the Web on your behalf, acting as your agent. Instead of just asking “Summarize what this page says about London f

Topics: ai instructions perplexity security user

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D4d4

news.ycombinator.com Unknown 2025-10-31 00:42:32

A co-worker of mine was looking at some disassembled ARM code the other day, and discovered something weird. Lots of d4d4 instructions, scattered about. LLVM’s objdump says this is a relative branch to -0x58 . The weird part is that they were always unreachable. Experiments¶ Here’s an example in a minimal reproducer I wrote: 00020100 < one >: 20100: 4770 bx lr 20102: d4d4 bmi 0x200ae <__dso_handle+0x100ae> @ imm = #-0x58 That bx lr right before the d4d4 branches to the link register. In other w

Topics: 4770 bx instruction lr main

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Branch prediction: Why CPUs can't wait?

news.ycombinator.com Unknown 2025-11-03 09:45:25

Recently, I have had some free time and started learning some low-level computer fundamentals, trying to practice and better understand the concepts in greater detail. Along the way, I learned about a modern compiler infrastructure named LLVM, which is a target-independent optimizer and code generator that has been used as a part of many compilers for different programming languages like Rust, Zig, or Haskell. While diving into LLVM’s aggressive optimization features, I have a humbling realizati

Topics: branch instruction price product total_revenue

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Launch HN: Reality Defender (YC W22) – API for Deepfake and GenAI Detection

news.ycombinator.com Unknown 2025-11-11 12:16:34

All in one package, and two main instructions: just upload the media you want to analyze, and check the results.

Topics: analyze check instructions just main

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OpenAI is improving ChatGPT voice mode

bleepingcomputer.com Unknown 2025-11-11 21:15:42

ChatGPT's Voice mode is already pretty good, but OpenAI is working on a new feature that will allow you to control how Voice mode actually works. As you can see in the screenshot below, OpenAI has added "Voice speed" to the ChatGPT web app settings for voice mode. This means you can control how fast ChatGPT can speak. You can lower it to 0.5x or make it as far as 2.0x. There is a slider that allows you to specify the ChatGPT pace. These options are currently hidden. Also, OpenAI has added "c

Topics: chatgpt instructions mode openai voice

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Rerank-2.5 and rerank-2.5-lite: instruction-following rerankers

news.ycombinator.com Voyage Ai 2025-11-16 03:12:32

TL;DR – We are excited to introduce the rerank-2.5 series, which significantly improves upon rerank-2 ’s performance while also introducing instruction-following capabilities for the first time. On our standard suite of 93 retrieval datasets spanning multiple domains, rerank-2.5 and rerank-2.5-lite improve retrieval accuracy by 7.94% and 7.16% over Cohere Rerank v3.5. Furthermore, the new instruction-following feature allows users to steer the model’s output relevance scores using natural langua

Topics: following instruction lite rerank retrieval

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rerank-2.5 and rerank-2.5-lite: instruction-following rerankers

news.ycombinator.com Voyage Ai 2025-11-16 15:12:32

TL;DR – We are excited to introduce the rerank-2.5 series, which significantly improves upon rerank-2 ’s performance while also introducing instruction-following capabilities for the first time. On our standard suite of 93 retrieval datasets spanning multiple domains, rerank-2.5 and rerank-2.5-lite improve retrieval accuracy by 7.94% and 7.16% over Cohere Rerank v3.5. Furthermore, the new instruction-following feature allows users to steer the model’s output relevance scores using natural langua

Topics: following instruction lite rerank retrieval

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How to Wash a Heated Blanket Safely

cnet.com See Full Bio 2025-11-19 02:08:00

Crawling into a warm bed after a long, hard day is hard to beat, but it isn't always a given. As we work our way towards the fall, you're probably already looking forward to getting your electric heated blanket out of the closet. And if you don't already own one, now is the time to start shopping for one. But like other blankets, they do need some upkeep -- and things get more complicated when there is electricity involved. One obvious question has probably already sprung to mind. Whether you'r

Topics: blanket heated instructions wash washing

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A Simple CPU on the Game of Life (2021)

news.ycombinator.com Unknown 2025-11-21 15:17:22

A Simple CPU on the Game of Life - Part 4 by Nicholas Carlini 2021-12-30 This is the fourth article in a series of posts that I've been making on creating digital logic gates in the game of life. The first, couple of articles started out with how to create digital logic gates and use them in order to construct simple circuits. In this post we're going to actually build a first real computer: a (2-stage pipelined) unlimited register machine. And later on ([5]) we'll make an even better computer

Topics: circuit going instruction just register

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Out-Fibbing CPython with the Plush Interpreter

news.ycombinator.com Unknown 2025-12-01 00:18:07

Out-Fibbing CPython with the Plush Interpreter In the last post I talked about Plush, the toy programming language with actor-based parallelism I've been tinkering with. The implementation is still immature, but it's reached a point where I can write fun programs that produce 2D/3D graphics and parallelize things over multiple CPU cores. Something I'd like to try soon, for the fun of it, is to animate a spinning cube with software rendering (rasterization). Before I get to that though, I'd like

Topics: bytecode fib function instruction push

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Test Results for AMD Zen 5

news.ycombinator.com Unknown 2025-12-22 14:44:57

Post by agner » 2025-07-26, 12:43:13 I have now finished testing the Zen 5. Thank you to the people who have helped running test scripts for me.My test results for the AMD Zen 5 are impressive. It has a lot of features that increase different aspects of the CPU performance to new levels, never seen before.Most importantly, the instruction fetch rate is increased from 16 to 32 bytes per clock cycle. The 16-bytes fetch rate has been a serious bottleneck in both Intel and AMD processors through ma

Topics: cycle instruction instructions vector zen

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Hackers Are Finding New Ways to Hide Malware in DNS Records

wired.com Dan Goodin 2026-01-10 22:30:00

Hackers are stashing malware in a place that’s largely out of the reach of most defenses—inside domain name system (DNS) records that map domain names to their corresponding numerical IP addresses. The practice allows malicious scripts and early-stage malware to fetch binary files without having to download them from suspicious sites or attach them to emails, where they frequently get quarantined by antivirus software. That’s because traffic for DNS lookups often goes largely unmonitored by man

Topics: dns ignore instructions previous traffic

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Beware! Research shows Gmail’s AI email summaries can be hacked

androidauthority.com Unknown 2026-01-16 02:32:50

Edgar Cervantes / Android Authority TL;DR A researcher recently demonstrated a Gemini flaw that could be exploited to inject malicious instructions while using Gmail’s email summary feature. These instructions were hidden in plain text under the body of the email. Google responded to the research, stating that it had updated its models to identify such prompt engineering measures and block phishing links. Big tech companies have been billing AI as the ubiquitous tool that frees us from munda

Topics: email gemini google instructions malicious

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Species at 30 makes for a great guilty pleasure

arstechnica.com Unknown 2026-01-19 00:20:53

Earlier this month, Hollywood mourned the passing of Michael Madsen, a gifted actor best known for his critically acclaimed roles in Reservoir Dogs, Kill Bill, and Donnie Brasco, among others. Few obituaries have mentioned one of his lesser-known roles: a black ops mercenary hired to help hunt down an escaped human/alien hybrid in 1995's Species. The sci-fi thriller turns 30 this year and while it garnered decidedly mixed reviews upon release, the film holds up quite well as a not-quite-campy B

Topics: alien earth extraterrestrial feldman instructions

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Understand CPU Branch Instructions Better

news.ycombinator.com Chris Feilbach 2026-01-20 22:34:04

Branch instructions are the primary means by which a program running on a CPU makes a decision. This post is part of a series of posts on CPU performance, as part of the Pointer Wars: Linked List Edition challenge. This challenge is great for undergraduates, graduate students, and new engineers who want feedback about writing high performance C or C++ code. Much more info here. The Sequential Execution Model and Branch Instructions Programs written to execute on a CPU follow something called

Topics: branch branches cpu instruction instructions

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Latest Tech News

Condor Technology to Fly "Cuzco" RISC-V CPU into the Datacenter

WASM 3.0 Completed

I got the highest score on ARC-AGI again swapping Python for English

Show HN: MCP Server Installation Instructions Generator

Interesting PEZY-SC4s

Memory is slow, Disk is fast – Part 1

Intel Patents 'Software Defined Supercore'

How is Ultrassembler so fast?

Condor's Cuzco RISC-V Core at Hot Chips 2025

Emulating aarch64 in software using JIT compilation and Rust

Expert: LSP for Elixir

Performance Speed Limits (2019)

How to slow down a program and why it can be useful

Slowing down programs is surprisingly useful

How to Slow Down a Program? and Why It Can Be Useful

Agentic Browser Security: Indirect Prompt Injection in Perplexity Comet

D4d4

Branch prediction: Why CPUs can't wait?

Launch HN: Reality Defender (YC W22) – API for Deepfake and GenAI Detection

OpenAI is improving ChatGPT voice mode

Rerank-2.5 and rerank-2.5-lite: instruction-following rerankers

rerank-2.5 and rerank-2.5-lite: instruction-following rerankers

How to Wash a Heated Blanket Safely

A Simple CPU on the Game of Life (2021)

Out-Fibbing CPython with the Plush Interpreter

Test Results for AMD Zen 5

Hackers Are Finding New Ways to Hide Malware in DNS Records

Beware! Research shows Gmail’s AI email summaries can be hacked

Species at 30 makes for a great guilty pleasure

Understand CPU Branch Instructions Better

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