PA-RISC Performance and History

PA-RISC Performance and History

PA-RISC was HP’s RISC computer design, incepted in the 1980s and developed in three generations from 32-bit to 64-bit until the 2000s, followed by Itanium VLIW. PA-RISC competed with other RISC platforms in the technical Unix workstation and server market and later became the top-performing RISC architecture, next to DEC Alpha.

PA-RISC CPU History Periods Period Year Processors Competition Early PA-RISC

PA-RISC 1.0 1986-1990 TS-1, NS-1, NS-2, PCX SPEC89 R2000, R3000, SPARC, i386, i486, VAX, 68040 PA‑RISC 1990s

PA-RISC 1.1 1991-1996 PA-7000, PA-7100, PA-7200, PA-7100LC, PA-7300LC SPEC92

SPEC95

MFLOPS R3000, R4000, 88000, POWER, SuperSPARC, PPC 604, Alpha 21064, 21164, Pentium and Pro 64‑bit PA‑RISC

PA-RISC 2.0 1996‑2005 PA-8000, PA-8200, PA-8500, PA-8600, PA-8700, PA-8800, PA-8900 SPEC2000

MFLOPS R10000, R12000, Pentium II, Xeon, UltraSPARC, Alpha 21164A, 21264, 21364, POWER3 and 4 EPIC VLIW

HP IA64 2001‑2006 Merced, Itanium 2 SPEC2000 PA-RISC, Alpha 21364, Pentium III and 4, Athlon and Opteron

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