I recently completed my second independent ASIC tapeout, and I've been getting tons of questions about the process.
So I made a write-up about the experience: https://essenceia.github.io/projects/blake2s_hashing_accelerator_a_solo_tapeout_journey/
The article walks through the full journey, from design constraints and architecture decisions to dealing with the major implementation challenges of a BLAKE2s hashing accelerator. This isn't a datasheet, it's a recollection of the reasoning behind the major choices.
If you're thinking about doing your own tapeout (or just curious what it takes), hopefully this will help :)
Don't hesitate to reach out if you have questions.
P.S: This article goes over the first ASIC, with an article on the AI accelerator (second ASIC) in the works.