GoKawiilby Ludovic Henry, RISE
Today, we are excited to announce the Early Availability of the RISE RISC-V Runners, a free, managed GitHub Actions runner service that gives any open source project access to real RISC-V hardware in their CI pipelines. No emulation, no cross-compilation hacks, no waitlist. Install a GitHub App, change one line in your workflow, and your jobs run on physical RISC-V boards.
Why this matters
One of the key barriers to RISC-V adoption is the classic chicken-and-egg problem: software projects won’t add RISC-V support without hardware to test on, and hardware adoption slows when the software ecosystem isn’t ready. Emulators like QEMU are invaluable for development, but they can’t catch the real-world issues (performance regressions, architecture-specific compiler bugs, kernel quirks) that only show up on actual silicon.
Until now, most open source projects that wanted to test on RISC-V hardware had to source their own boards, manage their own infrastructure, or rely on limited and oversubscribed shared resources. That’s a lot to ask of a maintainer who just wants to know if their library builds and passes tests on riscv64.
The RISE RISC-V Runners remove that barrier entirely. As part of the RISE Project’s mission to accelerate the RISC-V software ecosystem, we are providing this service free of charge to any open source project on GitHub.
How it works
Getting started takes minutes. There are two GitHub Apps depending on where you want to use the runners:
Install the one that fits your setup, then use the `ubuntu-24.04-riscv` label in your workflow:
jobs: build: runs-on: ubuntu-24.04-riscv steps: - uses: actions/checkout@v4 - run: uname -m # prints riscv64
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