GoKawiilAs is a tale, so is life: not how long it is,
but how good it is, is what matters.
— Seneca
Most Popular
Modern Microprocessors – A 90-Minute Guide! Jason R. C. Patterson. Technical paper, Lighterra, Mar 2026 (orig Feb 2001) A brief, pulls-no-punches, fast-paced introduction to modern processor microarchitecture. Originally a background appendix in Dr Patterson's PhD thesis, extracted into a separate paper by popular demand, now one of the world's most popular introductory articles on processor design & microarchitecture, with well over a million readers. This article is used by university courses around the world, and is "required reading" for many VC startups in Silicon Valley. Video Encoding Settings for H.264 Excellence Jason R. C. Patterson. Technical paper, Lighterra, Apr 2012 Detailed notes regarding the resolutions, bitrates and settings used for high-quality H.264 video encoding, and the reasoning behind those choices. This was one of several articles that were widely read/ used and influential in achieving high video quality on the web – you can probably remember when web video such as YouTube went from quite poor quality to quite good.
Programming Languages & Compilers
Accurate Static Branch Prediction by Value Range Propagation Jason R. C. Patterson. Proceedings of the ACM SIGPLAN '95 Conference on Programming Language Design and Implementation (PLDI), Jun 1995, pages 67-78 Describes the value range propagation (VRP) algorithm and its use in static branch prediction. This algorithm is now used by many, possibly even most, production compilers, both for branch prediction and for other value/ type propagation optimizations and static analysis. Basic Instruction Scheduling (and Software Pipelining) Jason R. C. Patterson. Technical paper, Lighterra, Sep 2003 (orig Feb 2001) Introduction to instruction scheduling and software pipelining for straight-line code (basic blocks). Originally a background appendix in Dr Patterson's PhD thesis, extracted into a separate paper by popular demand, now used by several university compiler courses. Coding Guidelines To Live By Jason R. C. Patterson. Technical paper, Lighterra, Mar 2014 (orig Mar 2004) Coding guidelines checklist covering topics from general program/ API design to language-specific issues for C, C++, Objective-C, Java etc. Efficient RISC Style Code Generation for CISC Architectures Jason R. C. Patterson. Honors thesis, Bond University, Apr 1992 Honors thesis discussing the design and implementation of a C++ compiler for the MIPS RISC and Motorola 68k CISC architectures, showing it's possible to use low-level, RISC-like intermediate code and still perform good instruction selection for traditional, complex instruction sets. Exception Handling Considered Harmful Jason R. C. Patterson. Technical paper, Lighterra, Nov 2005 Counterpoint to the prevailing view that exception handling is the best method of error handling for modern software development – a critically important issue for future programming-language design. Optimizing for Superscalar Processors Jason R. C. Patterson. Technical paper and seminar, Queensland University of Technology (QUT) and Distributed Systems Technology Centre (DSTC), Oct 1993 Overview of the challenges and evolving optimization techniques for superscalar processors. Register Allocation by Graph Coloring Jason R. C. Patterson. Technical paper, Lighterra, Sep 2003 (orig Feb 2001) Introduction to register allocation by graph coloring. Originally a background appendix in Dr Patterson's PhD thesis, extracted into a separate paper by popular demand, now used by several university compiler courses. VGO – A Very Global Optimizer Jason R. C. Patterson. PhD thesis, Queensland University of Technology (QUT), Feb 2001 PhD thesis discussing the idea behind executable optimization and the design and implementation of a real-world executable optimizer. This thesis was rated "quite simply the finest PhD dissertation in experimental computer science that I have ever read" by the author of a leading textbook and former editor of the top journal in the field. Zero-Cost Executable Rewriting Jason R. C. Patterson. Technical paper, Queensland University of Technology (QUT), Oct 1994 Discusses new, original techniques for reading and rewriting executable files without the performance loss incurred by existing methods.
Hardware & Processor Design
Alpha & EV4 – The Architecture & The First Implementation Jason R. C. Patterson. Technical seminar, Queensland University of Technology (QUT), Oct 1992 Technical overview and analysis of the design of the DEC Alpha architecture and Alpha 21064 (EV4) processor, which looked to be the future of computer architecture at the time. Microsim – A Microarchitecture Simulator Jason R. C. Patterson. Technical paper, Bond University, Aug 1991 Discusses the features, design and implementation of a visual, programmable microarchitecture simulator and debugger. Modern Microprocessors – A 90-Minute Guide! Jason R. C. Patterson. Technical paper, Lighterra, Mar 2026 (orig Feb 2001) A brief, pulls-no-punches, fast-paced introduction to modern processor microarchitecture. Originally a background appendix in Dr Patterson's PhD thesis, extracted into a separate paper by popular demand, now one of the world's most popular introductory articles on processor design & microarchitecture, with well over a million readers. This article is used by university courses around the world, and is "required reading" for many VC startups in Silicon Valley.
World Wide Web Technology
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