GoKawiilIntel announced this week that it’s working with SoftBank subsidiary SAIMEMORY to commercialize Z-Angle Memory (ZAM), an advanced type of DRAM that stacks memory modules vertically. While ZAM chips aren’t expected to become available for at least three years, they could eventually replace the high-bandwidth memory (HBM) that is in such high demand today thanks to the AI boom.
Memory bandwidth is currently a major bottleneck in AI processing, as organizations seek to move ever greater chunks of data from memory into GPUs and back into memory. Chipmakers like Nvidia and AMD are putting hundreds of gigabytes worth of HBM on their GPU dies to help alleviate that bottleneck. However, surging HBM demand has led to a global shortage in NAND stocks, pushing up the price of RAM modules and NVMe storage and leading to supply chain shortages.
ZAM is a new memory technology that could potentially rewrite the rules of DRAM. Like HBM, ZAM memory technology utilizes vertical stacking along the Z-axis (hence the name Z-Angle). However, it promises 2x to 3x the capacity of HBM and higher bandwidths at a fraction of the energy and cost.
Intel’s agreement with SAIMEMORY calls for the two companies to leverage the foundational technology and expertise that Intel developed as part of the Next Generation DRAM Bonding (NGDB) program.
The NGDB program is part of the Advanced Memory Technology (AMT) project, the Department of Energy and National Nuclear Security Administration (NNSA) initiative that brought vendors like Intel, SK Hynix, and SoftBank together with DOE government labs to develop new memory technologies, including ZAM, HBM, Compute Express Link (CXL), and non-volatile memory, like magnetic random access memory (MRAM).
The NGDB program is currently in its third year with Intel and the “Tri-Lab,” or Sandia National Laboratory, Lawrence Livermore National Laboratory, and Los Alamos National Laboratory. Years one and two were dedicated to research and development, while the third year will focus on productization.
In January, Sandia shared the progress that the Tri-Lab has made with a “novel stacking approach” as part of the NGBD project. Specifically, the lab showed how it vertically bonded eight memory wafers to a base wafer using an alternative “via-in-one” construct.
“Intel’s Next-Generation DRAM Bonding initiative has demonstrated a novel memory architecture and revolutionary assembly methodology that significantly increases DRAM performance, reduces power consumption, and optimizes memory costs,” Joshua Fryman, CTO of Intel Government Technologies, stated in the Sandia progress update. “Standard memory architectures aren’t meeting AI needs, so NGDB defined a whole new approach to accelerate us through the next decade.”
Gwen Voskuilen, principal member of technical staff at Sandia, said the Intel breakthrough is “an exciting technology that we anticipate will lead to a wider adoption of higher bandwidth memories in systems that are currently unable to take advantage of high bandwidth memory due to its limited capacity and power constraints.”
“The demonstration confirms that the NGDB technologies can be combined to yield a highly performant memory with high-volume manufacturing,” he added.
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