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Show HN: We built an 8-bit CPU as 2nd year EE students

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Why This Matters

The STEPLA-1 project showcases a fully functional 8-bit CPU built entirely from individual logic gates, providing unparalleled transparency and educational value. Its gate-level design allows students and developers to understand the inner workings of CPU architecture without black box components, fostering deeper insights into digital logic and hardware design. This approach highlights the importance of hardware transparency and modularity in advancing computer engineering education and hardware debugging techniques.

Key Takeaways

STEPLA-1 8-bit Hardwired CPU

A complete 8-bit Harvard architecture CPU designed and simulated in Logisim-Evolution, built entirely from individual logic gates down to the gate level.

Version: 2.4.2

Status: Under Development

What Is STEPLA-1?

STEPLA-1 is a fully functional 8-bit CPU where every component; registers, decoders, ALU, control unit is built from individual 74-series logic gates. No black box components. Every signal path is visible, traceable, and documented.

Unlike EEPROM-based designs, STEPLA-1 uses a fully hardwired control unit a gate-level AND/OR matrix where every control signal is a physical gate whose inputs you can probe with a multimeter. This makes the machine transparent in a way that microcode-based designs cannot be.

Key Features

Architecture

8-bit Harvard architecture

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