IBM says it can fit nearly 100 billion transistors on a chip - why the milestone matters

IBM's NanoStack sub-1nm chip arrives IBM

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ZDNET's key takeaways

IBM's sub-1-nanometer NanoStack architecture holds almost 100 billion transistors on a chip.

These chips are cheaper to run and more powerful than previous generations.

NanoStack technology will be great for deploying AI workloads.

TSMC, Intel, and Samsung have all been pushing to produce low‑single‑nanometer chips in the next two years, while planning to produce sub-nanometer chips sometime by decade's end. That race may be over, however, even before it began. IBM unveiled what it says is the world's first sub-1-nanometer chip technology based on a new 3D NanoStack transistor architecture at the 0.7 nm — or 7 angstrom — node.

The research device, introduced ahead of VLSI 2026, is designed to pack nearly 100 billion transistors on a fingernail‑size die, roughly doubling the density of IBM's earlier 2-nm test chip, first shown in 2021. Today, the smallest, most powerful chips top out at about 80 billion transistors.

Also: Why your RAM options cost 4X more now than last year - even legacy tech prices aren't immune

What's so important about teeny-tiny chips? They're valuable because they let you pack more transistors into a given area while using less power, which translates into higher performance, lower energy use, and lower cost per unit of compute. In case you've been living under a rock, AI demands low-power, cheap chips. There's a huge market for these chips.

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