GoKawiilTL;DR IBM is showing of a sub-nm architecture, having created a 3D “nanostack” design at the 0.7nm node.
The technology builds vertical towers of transistors, staggering their placement, to increase density.
IBM believes that its design could be ready for production with the next 5 years.
Only a few years back, we were still looking forward to smartphone chips manufactured on a 2nm process as the next big thing. Fabrication advancements have now made 2nm chips a reality — so what’s next? Engineers have already been pushing the limits of physics for a while now, and although they’re probably going to come up against a wall at some point, we’re not there quite yet, as IBM announces its new 0.7nm solution.
A smaller and smaller fabrication level isn’t the only factor that impacts chip performance, but it’s nonetheless still a very important one. As we go smaller, not only can manufacturers fit more chips on the same silicon wafer, but those chips have the potential to run faster and cooler, thanks to more compact designs and shorter paths for data to travel.
IBM’s solution employs a 3D “nanostack” architecture, staggering transistor placement as the chip is built out vertically.
Before you start getting too excited, though, there’s a big difference between showing that a chip design like this is possible, and being ready to start cranking out 0.7nm Snapdragon or Exynos chips. As Neowin points out, IBM was first to show off 2nm chips, back in 2021, but it didn’t end up being the company that ultimately made that kind of fabrication commercially viable.
That means that this accomplishment is less a direct preview of where chips are immediately going next, and more a technical demonstration of what’s possible on the horizon. IBM says that this sub-nm tech could conceivably be production-ready in something like 5 years.
Even if that means we’ve got a nice, long wait ahead of us before there’s even a remote chance of seeing anything like this in our phones, IBM’s advancement is still very good news to get. As you can see in the company’s imagery above, we are making chips at a level where you can count the individual atoms in the logic gates, and it’s just getting less and less possible to find new ways to build them smaller. For the sake of our future devices, we’re just glad that talented engineers are still dreaming up new ways to get us there.
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