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IBM MCGA Gate Array Reverse Engineering

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Why This Matters

The reverse engineering of IBM's MCGA gate arrays provides valuable insights into the design and manufacturing of early graphics hardware, highlighting the complexity and innovation behind low-cost video chipsets. This knowledge benefits both vintage hardware preservation and modern chip design by revealing detailed architecture and manufacturing processes. It also underscores the importance of reverse engineering in understanding legacy systems that shaped current graphics technology.

Key Takeaways

IBM MCGA Gate Array Reverse Engineering

IBM's MCGA (Multi-Color Graphics Array) is a low-cost video chipset introduced with the PS/2 models 25 and 30. The Epson Equity 1e uses MCGA compatible video but does not use the same chips.

The IBM chipset consists of the memory controller gate array and the video formatter gate array. Some examples of these were fabricated on an internal IBM gate array process, while others used an external gate array part by Seiko.

Memory Controller Gate Array (72X8300)

This gate array contains an implementation of the MC6845 sync generator IC, manages the video RAM interface to the ISA bus, manages the character RAM interface, and a few other miscellaneous functions including clock selection and monitor ID readback.

The example I have reverse engineered is implemented using a Seiko SLA6430 gate array. It contains 4,342 basic cells (BCs) with 4 transistors each. The BCs are arranged in 167 rows and 26 columns. This is a 2um CMOS process with 2 metal layers.

The image is from 72x8300-sla6430j

The reverse engineered schematic and layout can be found in the mcga72x8300flat subdirectory.

Video Formatter Gate Array (72X8205)

The formatter gate array decodes the ISA memory and IO port addresses, manages the RAMDAC interface, and generates pixel data in both graphics and text modes.

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