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Designing an Ethernet Switch ASIC

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Why This Matters

The development of the world's first open source Ethernet switch ASIC marks a significant milestone in open hardware, promising increased transparency, customization, and innovation in networking equipment. This breakthrough could challenge proprietary solutions, fostering a more open and competitive industry for consumers and developers alike.

Key Takeaways

AI disclosure: All bugs are 100% human made.

It seems I have just built the world’s first open source switch ASIC and I am getting it back from the fab mid november. Switch floorplan render with area density view enabled, occupying 711.2 x 325 um of area. The first version of this chip is currently taped out on the Tiny Tapeout gf26b shuttle chip, part of the second wafer.space run. Silicon bring-up is expected to start 2026-11-15 .

Here is its repository :

Buckle up and welcome to the tale of more madness.

Where are the open source networking ASICs? #

Recent FCC decisions have put the central importance of networking equipment top of mind, and in doing so, have also put the total absence of any entirely open source networking equipment hardware at the top of my mind.

Although Open Source Silicon is in its infancy we are currently seeing a number of projects being designed, tested, and for the most ambitious ones, even taped-out with some proven silicon already in the wild.

That said, the vast majority of the most ambitious projects are predominantly RISC-V SoCs.

Surprisingly, there has been much less interest in building open hardware for networking equipment.

Well .. unsurprisingly actually … networking equipment is far less “sexy” than CPUs and has thus received much less attention from the open source community. On the other hand, this means there’s a huge untaped boulevard of projects open to anyone with more time than common sense to build open source networking equipment chips!

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