Controlling the pesky puddle
While we were able to achieve tremendous progress, immersion lithography was not out of the woods yet. It had to now be prepared for mass production. Defectivity posed a real threat to the economics of early immersion systems as any flaws in reproducing the geometric pattern of the mask onto the silicon wafer would result in yield loss, which was the most important performance indicator in a chipmaker’s mass production process. Adding a puddle of water to a high-speed stage introduced two new potential sources of defects: bubbles could form under the lens, degrading imaging performance. To make matters worse, escaped water droplets could interact uncontrollably with the photosensitive coating on the wafer. It was not an option to sacrifice system productivity by slowing down the wafer stage: doing so would make the system unaffordable.
To better understand the behavior of the puddle and find ways to control it, researchers at ASML again tapped into our extensive academic network. Professor Detlef Lohse, a German fluid dynamics and mechanics researcher at Twente University, dedicated considerable time and energy to furthering our knowledge about the fundamental physics at work in immersion lithography. This improved understanding sparked engineering ideas from our Research and Development team and high-tech supply chain. The team narrowed the solution space enough to identify a basic engineering mechanism: dubbed the 'immersion hood,' this new part of the lithography system formed a ring around the last lens element to control the puddle. "Over the years that followed, basic prototypes could be tested, the best concept would be industrialized, and this ultimately allowed us to triple the speed of the wafer while reducing defectivity by an order of magnitude," says Jos Benschop, Senior Vice President of Technology at ASML. By the end of 2004, TSMC had announced the first fully functional 90-nanometer node chips manufactured with our early immersion systems.
By 2006, we had launched XT:1700Fi, bringing immersion lithography into volume production. The numerical aperture of the new system increased from 0.93 to 1.2, bypassing the perceived pre-immersion barrier of 1.0 and providing a viable path to continue shrinking transistors past the 65-nanometer node. The system's record-breaking imaging performance enabled chipmakers to improve resolution by 30%, the largest improvement in decades, while system productivity increased to 122 wafers per hour, also a record at the time.
Further refinements and new systems followed, driving up imaging performance and system productivity while allowing chip makers to catch up with Moore's Law and push their roadmaps forward.