GoKawiilD-Matrix unveils Raptor 3D-DRAM accelerator chip at Hot Chips 2026
D-Matrix introduced Raptor, a new accelerator that stacks compute logic directly on top of DRAM dies to tackle memory bottlenecks in generative AI inference. The design aims to bridge the gap between SRAM's speed but tiny capacity and HBM's larger capacity but bandwidth and power limitations, following the company's earlier Corsair and JetStream products.
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As AI models grow and context windows expand, the combination of model weights and KV cache creates massive memory demands that neither pure SRAM nor HBM can efficiently satisfy at scale. By stacking compute onto DRAM, D-Matrix is betting that a new memory-compute architecture can unlock higher effective bandwidth without the prohibitive power costs seen in HBM4-based systems from NVIDIA and AMD.
- Raptor stacks compute logic on DRAM dies to address both capacity and bandwidth limits in AI inference.
- SRAM offers extreme bandwidth but only gigabytes of capacity, making it impractical for storing large model weights.
- HBM4 solutions face a practical bandwidth ceiling near 20 TB/s and steep power costs at high throughput, motivating new architectures like Raptor.
Source: servethehome.com — Patrick Kennedy, 2026-09-14
Published there as: “D-Matrix Raptor 3D-DRAM Accelerator for Generative Inference at Hot Chips 2026”
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