GoKawiilAMD's Venice-X EPYC chips to hit 5.3 GHz with stacked cache, due late 2026
AMD has disclosed that its upcoming Venice-X EPYC server processors will offer a 5.3 GHz boost clock, matching the top speed across the entire Venice lineup, while retaining the 96 cores and 1,152 MB of 3D V-Cache seen in the prior Genoa-X chips. The part is expected in the second half of next year and marks the return of AMD's stacked-cache technology to data center CPUs after Turin skipped an X-series variant, following Milan-X in 2022 and Genoa-X in 2023.
GoKawiil's interpretation of the reporting above, not reported fact.
Previous EPYC-X chips sacrificed clock speed for extra cache, limiting their appeal outside specific HPC workloads; by unifying the top frequency with the largest cache pool, AMD appears to be removing that trade-off, which could make Venice-X more broadly competitive for high-performance computing. Full details on base clocks, SKU count and TDP remain undisclosed, so the actual market impact will depend on information AMD has not yet released.
- Venice-X revives AMD's 3D V-Cache in servers after a four-year gap since Genoa-X
- Boost clock reaches 5.3 GHz, the same peak as standard Venice chips, unlike earlier X-series parts
- Expected in the second half of next year with 96 cores and 1,152 MB of L3 cache, though full specs are still unknown
Source: tomshardware.com — Jake Roach, 2026-11-11
Published there as: “AMD’s Venice-X maxes out family at 5.3 GHz, returning 3D V-Cache to data center after four years”
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