GoKawiilHuawei has announced a new chip design framework aimed at closing the technology gap with global semiconductor leaders like TSMC and Nvidia, targeting '1.4nm-class' transistors and a 55% increase in transistor density. The firm also unveiled a new 'Tau Scaling Law' that's designed to replace Moore's Law for future chip scaling. Unveiled at the IEEE International Symposium on Circuits and Systems (ISCAS 2026) in Shanghai on Monday, this new design method is intended to circumvent strict US trade sanctions. It allows the company to develop high-performance smartphones and AI processors without relying on restricted Western manufacturing equipment like extreme ultraviolet (EUV) lithography machines.
Delivering a keynote address at the symposium, He Tingbo — a Huawei board member and President of its semiconductor division, HiSilicon — unveiled the company's new, proprietary “LogicFolding” architecture. The cutting-edge design blueprint is built directly upon the newly introduced Tau Scaling Law.
He revealed that Huawei has spent the last six years quietly refining the methodology, secretly designing and mass-producing 381 chips based on the principle. The company will debut the LogicFolding architecture in flagship Kirin smartphone processors this autumn.
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Traditional chipmaking relies on Moore's Law (geometric scaling), which involves shrinking physical transistor sizes. However, as US sanctions blocked China's access to the extreme ultraviolet lithography machines required to implement this approach, HiSilicon has pivoted to a completely different methodology: the Tau scaling law.
Tau Law is a "temporal scaling" framework that prioritizes signal speed, optimizing how fast data moves across a system rather than how small the components are. To execute this theory on a commercial level, Huawei engineered the LogicFolding architecture, a blueprint that physically folds and stacks logic circuits into a dual-layer framework. By drastically shortening internal wiring to eliminate signal delay, the resulting hardware achieves a 55% increase in transistor density and a 41% boost in power efficiency, enabling Huawei to build cutting-edge processors that rival foreign counterparts without Western equipment.
The company’s upcoming Kirin smartphone chips — highly anticipated for the flagship Huawei Mate 90 series — will be the first commercial processors to feature the LogicFolding architecture. The company aims to scale this architecture to its Ascend AI processors and high-capacity data center clusters by 2030. This will provide local alternatives to restricted Nvidia hardware. By 2031, Huawei confidently projects it can design high-end chips with a transistor density equivalent to a 1.4-nanometer (nm) process.
Huawei's announcement comes as China continues its push to end dependence on foreign semiconductor players — amid sanctions and concerns about over-reliance — by aggressively investing in domestic companies and alternative technologies.
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Following the announcement, shares for China's largest contract chipmaker, SMIC, surged by 7.6%. The breakthrough is a major symbolic and practical win for Beijing’s push toward complete technological self-sufficiency. While global foundry leader TSMC expects to mass-produce true 1.4nm chips by 2028, Huawei's alternative path means China can dramatically close the performance gap by packaging and structuring chips differently — significantly mitigating the impact of the US clampdown.
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