GoKawiilIMECAS demonstrates working GAA transistors using DUV lithography, not EUV
China's Institute of Microelectronics (IMECAS) says it has completed early process integration for stacked-nanosheet gate-all-around transistors built entirely with immersion DUV lithography rather than EUV machines. The devices showed Ion/Ioff ratios above the 5×10⁵ threshold, proving basic gate control works, but the institute has not released gate pitch, density or other metrics needed to compare it to commercial 3nm chips.
This signals that Chinese researchers are pursuing a homegrown path to advanced transistor architecture despite being cut off from EUV lithography tools controlled by ASML and its allies. Even though the result is far from a manufacturable process, it shows China is investing in alternative engineering routes to sustain progress toward smaller nodes under export restrictions.
- IMECAS built working GAA transistors using only DUV lithography, no EUV involved
- Test results show functional gate control but no data on density or dimensions versus 3nm rivals
- The work remains an early research milestone, not a production-ready manufacturing process
Source: tomshardware.com — Anton Shilov, 2026-09-21
Published there as: “China crafts working 3nm gate-all-around transistors without EUV”
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