Kyoto University's SiC transistor design fixes leakage and voltage drift at 600°C
Researchers at Kyoto University led by Mitsuaki Kaneko, Shunya Shibata, and Tsunenobu Kimoto built a silicon carbide transistor that operates at 600°C using standard ion implantation, the same doping process used in commercial chip fabs. Their bottom-gate, double-well design narrowed the gap between designed and measured threshold voltage to under 0.1V at 400°C, a sharp improvement from the more than 2V drift seen in conventional layouts, while also curbing substrate leakage as temperatures rise.