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Second leaker Kopite7kimi says Nvidia RTX 6000 GPUs delayed to 2028

Prominent leaker Kopite7kimi now expects Nvidia's Rubin-based RTX 6000 series to launch in 2028, later than his earlier forecast of late 2027. This aligns with a similar prediction from leaker Kepler_L2, who also expects AMD's RDNA 5 Radeon 10000 series to slip to 2028, though AMD's smaller 'AT2' GPU remains on track for next year.

OpenAI's ChatGPT Now Auto-Updates Memory, Offers New Controls

ChatGPT's memory feature has evolved from requiring users to explicitly say 'remember this' into an automatic system that continuously updates and revises what it retains about you, a process OpenAI calls 'dreaming.' This means the chatbot now decides on its own what details from your conversations to keep, edit, or discard, shaping how it responds to future prompts.

Cloudflare cuts 100TB of RAM usage in Pingora Backend Router via consistent-hashing fix

Cloudflare engineers found that its internal load-balancing service, Pingora Backend Router, was consuming far more memory than necessary in its pingora-ketama consistent-hashing library. By reworking the underlying algorithm with better math and Rust code, the team eliminated the excess memory usage across its global fleet.

AI memory boom triggers price surge for NOR flash and SLC NAND chips

Analysts at Morgan Stanley, JPMorgan, and TrendForce report that legacy memory types like NOR flash and SLC NAND are facing severe supply shortages as manufacturers redirect production capacity toward more profitable HBM and DRAM chips driven by AI demand. Contract prices for both chip types have already more than doubled in the first half of 2026, with SLC NAND expected to rise another 120-170% in the second half.

Jemalloc 5.4.0 released with pinned-memory tracking and tcache overhaul

The jemalloc project shipped version 5.4.0, a maintenance-focused update spanning more than 160 commits aimed at reducing technical debt through refactoring, bug fixes, expanded test coverage, and portability fixes. Key additions include an EXTENT_ALLOC_FLAG_PINNED flag letting custom allocation hooks mark non-reclaimable mappings like HugeTLB pages for preferential reuse, plus new mallctl interfaces to report pinned-memory and mutex statistics. The update also replaces the old fixed tcache refill/flush policy with a dynamic system that adapts to observed demand, removing seven legacy tuning controls in the process.

x86-to-ARM Emulators Face Deep Memory-Ordering Bottleneck

A technical deep dive explains why translating x86 software to run on ARM chips runs into a persistent obstacle: x86's strict Total Store Ordering (TSO) memory model clashes with ARM's much more relaxed memory consistency rules. The piece walks through why this mismatch affects essentially every emulated multi-threaded application and outlines the various workarounds engineers use, noting some cases where no clean fix exists.

SK Hynix in talks to make Apple memory chips at Intel's Ohio plant

Reuters reports that SK Hynix, which supplies Apple with RAM and flash memory, is discussing a deal with Intel to produce chips at Intel's planned Ohio facility, potentially leasing part of the site. This would mark the first time the South Korean company manufactures memory chips on US soil, though sources say details remain unclear and nothing has been finalized.

Corsair Prices 32GB DDR5 Vengeance Kits at Under $420 Amid Rising Memory Costs

Corsair is selling a 32GB DDR5-6200 Vengeance RAM kit for $419.99, and a slower DDR5-5600 RGB variant for $409.99, both currently the lowest prices available for 32GB DDR5 memory. The kits use two 16GB modules with aluminum heat spreaders, and the cheaper option adds adjustable RGB lighting but runs at reduced speed and looser timings.

Go 1.27 speeds small heap allocations via size-specialized functions

Go 1.27 introduces specialized memory allocation functions for objects of 80 bytes or smaller, tailored to the runtime's existing size-class system. These functions handle specific size classes and pointer/non-pointer distinctions, letting the compiler skip generic branching logic used in the shared mallocgc path.

505 Games engineer details GPU texture memory layout challenges in console porting

A developer working at 505 Games on porting a custom PC game engine to consoles published a technical blog post explaining the hidden complexity of converting texture data between platforms. Using a 1024x1024 BC7-compressed wood texture as an example, the post walks through concepts like block compression, texel ordering, mip levels, and texture tiling that must all be correctly handled together to avoid corrupted images.

Micron unveils 512GB DDR5-9200 RDIMMs for high-core-count servers

Micron has launched its first 512GB DDR5-9200 memory module aimed at high-density servers, allowing systems to reach up to 12TB of total memory. The module uses vertically stacked DRAM dies connected via through-silicon vias, and is currently being validated by AMD and Intel for their upcoming server platforms.

Memory shortage forces smaller phone and laptop makers to redesign products, verify chip authenticity

A global memory chip shortage is pushing smaller device makers like Fairphone, Jolla, and Framework to rethink product design, order chips months ahead, and test incoming shipments for counterfeits. Fairphone's CEO says memory now accounts for nearly 60% of the bill of materials on its roughly $400 phones, while SK Hynix's chief has warned the shortage could persist until 2030, peaking in severity around 2027.