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Microsoft updates Surface Pro 12-inch and Surface Laptop 13-inch with Snapdragon X2 Plus

Microsoft is releasing updated versions of its smaller Surface Pro and Surface Laptop models on October 13th, powered by Qualcomm's Snapdragon X2 Plus chips. The devices keep the same design, displays and ports as last year's models but now start at 16GB of RAM, with the Surface Pro starting at $1,149.99 and the Surface Laptop at $1,199.99 — both notably higher than their predecessors' starting prices of $799.99 and $899.99.

Qualcomm unveils Snapdragon 8 Elite Gen 6 chips with agentic AI focus

Qualcomm announced the Snapdragon 8 Elite Gen 6 and 8 Elite Extreme Gen 6 mobile processors at its Snapdragon Summit, built on a 2nm process with dual 5GHz Oryon Prime cores. The chips bring notable CPU, GPU and NPU gains over the prior generation, alongside power efficiency improvements, and will ship in upcoming flagship phones from brands including Honor, Motorola, Oppo, Vivo and Xiaomi. Qualcomm emphasized AI agent capabilities, such as automated video sorting and location-based notifications, as the lineup's central feature.

Microsoft brings Auto Super Resolution upscaling to Intel Copilot+ PCs

Microsoft has expanded Automatic Super Resolution, its NPU-driven upscaling feature built into Windows, to Copilot+ PCs powered by Intel's Core Ultra Series 3 chips, a capability previously exclusive to Qualcomm Snapdragon X devices. The feature aims to boost frame rates in games rendered at up to 1080p, with Microsoft citing gains of up to 15% in titles like Assassin's Creed Valhalla, targeting a 60 FPS threshold.

Open-source npunlock lets developers run custom C kernels on Intel NPUs

A new open-source project called npunlock reconstructs a path for writing custom C kernels that run directly on the programmable SHAVE cores inside Intel's NPUs, bypassing Intel's official stack which only exposes graph-level programming. The project has been verified on Windows x64 with Meteor Lake and the NPU3720 chip, and its latest update adds support for combining independent FP32 and FP16 custom code branches within a single execution graph.

Huawei limits next-gen Ascend AI chips to China due to supply constraints

Huawei says it will not sell its upcoming Ascend 900-series AI accelerators internationally because it cannot yet meet domestic Chinese demand for the chips. Chairman Eric Xu said the company only ships limited volumes to a few countries with especially strong demand. The announcement came alongside a roadmap showing major performance gains for the Ascend 960, 970 and 980 NPUs through 2027.

Developer revisits Apple Neural Engine reverse-engineering as M5 folds NPU into GPU

A developer who abandoned reverse-engineering Apple's Neural Engine (ANE) three years ago has resumed the project, this time focused on mapping its full internal architecture rather than making it usable via a Linux driver. The renewed effort was prompted by Apple's M5 chip, which emphasizes LLM performance and integrates ANE cores directly into the GPU, signaling the decline of the standalone neural processing unit design that began with the A11 Bionic in 2017.

Google's TPU chips diverge from GPUs and NPUs in AI hardware roles

The piece explains how Google's Tensor Processing Units (TPUs), built for AI workloads in data centers, differ from GPUs and NPUs. TPUs are now replacing NPUs in Google's upcoming Pixel 11 phones, with Google claiming up to 3.5 times faster AI processing at up to 3.5 times less energy use. GPUs, meanwhile, remain versatile chips handling gaming, 3D rendering, AI training and crypto mining.