GoKawiil
Tech News
Infineon Technologies said it has processed 300-millimeter silicon carbide wafers into functional power devices at its Villach, Austria fab, using existing silicon manufacturing equipment. The company says it is the first to achieve this in a full-scale fab setting, and plans to publicly display the wafer at electronica in Munich starting November 10, 2026.
Commonwealth Fusion Systems said it will receive $85 million from the U.S. Department of Commerce under the CHIPS Act to develop advanced power electronics for fusion plants, with the government taking a stake in the company. The funds will support silicon carbide power electronics, radiation-hardened and radio-frequency components, and adapting AI chips like GPUs and TPUs for use in fusion reactors.
The U.S. Department of War's Office of Strategic Capital has issued Wolfspeed Inc. a conditional 30-year loan commitment letter worth $1.5 billion. Wolfspeed, which makes silicon carbide and gallium nitride materials, plans to use the funds to upgrade GaN epitaxy capabilities and develop radiation hardening for its products. The loan requires Wolfspeed to issue warrants for up to 7.5% of its fully diluted equity, and remains subject to due diligence, government approvals and existing lender consent.
Rising electricity demand from AI data centers is spurring investment in solid-state power transformers, which use semiconductor switching instead of the century-old copper-coil design of conventional transformers. Unlike traditional units, which are hand-built and face multi-year delivery backlogs, solid-state versions can be mass-produced using materials like silicon carbide, making them smaller, lighter, and modular. Tech companies building AI infrastructure are especially drawn to them because they suit the direct current power setups increasingly used to run dense racks of AI chips.
Researchers at Kyoto University led by Mitsuaki Kaneko, Shunya Shibata, and Tsunenobu Kimoto built a silicon carbide transistor that operates at 600°C using standard ion implantation, the same doping process used in commercial chip fabs. Their bottom-gate, double-well design narrowed the gap between designed and measured threshold voltage to under 0.1V at 400°C, a sharp improvement from the more than 2V drift seen in conventional layouts, while also curbing substrate leakage as temperatures rise.