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Independent Tester Reports AMD Processors Never Output Zero From RNG Instructions

A Brazilian electronics engineer and assembly programmer named Jessé says he has tested two AMD processors extensively and found that the chips' hardware random number generator, accessed via instructions like rdrand and rdseed, has not produced a single zero value in over nine days of continuous testing. He has reported the issue to AMD, which has escalated it internally, though no technical explanation has been provided yet. Jessé also updated his testing application to benchmark RNG speed and support processors lacking the rdseed instruction, noting large performance differences across CPU generations.

Developer 0xAX builds Conway's Game of Life in a 512-byte boot sector

A project called BootLife implements Conway's Game of Life entirely within a 512-byte x86 boot sector, using VGA memory to display the simulation grid. It's shared on GitHub as a Show HN post, built with NASM and runnable via QEMU, with source code and a Makefile provided for building and testing.

x86-to-ARM Emulators Face Deep Memory-Ordering Bottleneck

A technical deep dive explains why translating x86 software to run on ARM chips runs into a persistent obstacle: x86's strict Total Store Ordering (TSO) memory model clashes with ARM's much more relaxed memory consistency rules. The piece walks through why this mismatch affects essentially every emulated multi-threaded application and outlines the various workarounds engineers use, noting some cases where no clean fix exists.

Intel's x86 UD2 instruction traces back to two rival undefined opcodes, 0F FF and 0F B9

A Microsoft engineer explains the history behind x86's UD2 instruction, which architecturally guarantees an invalid opcode exception and is used by compilers to mark unreachable code. Before UD2 existed, developers relied on undocumented byte sequences like 0F FF and 0F B9 that happened to trigger the same crash behavior, splitting programmers into informal camps depending on which sequence they used.

How to squeeze more battery life out of a Windows 11 laptop

A tech guide outlines practical settings changes Windows 11 users can make to extend laptop battery life, noting that x86-based machines remain more power-hungry than ARM alternatives and that Windows 11 itself carries performance overhead. The top recommendation is lowering screen brightness via the Win + A shortcut, alongside other adjustments that trade some performance for longer runtime.

Chips and Cheese benchmarks Windows 11's Prism translator against native Arm code

A technical analysis compares Microsoft's Prism binary translator, which lets x86-64 Windows software run on Arm-based aarch64 processors, against native Geekbench 7 performance. Using a pro key from Primate Labs founder John Poole to profile individual workloads, the tester measures how much performance is lost when translating x86-64 instructions instead of running aarch64 code directly.

Martin Uecker details GCC hack for nested-function callbacks without executable stack

A technical blog post by Martin Uecker examines how GCC compiles nested functions using trampolines placed on the stack, which normally require the stack to be executable. He shows that by extracting the code address and static chain values embedded in the trampoline and passing them to the __builtin_call_with_static_chain built-in, developers can indirectly call nested functions on older GCC versions without needing an executable stack.