OKI Circuit Technology develops 124-layer PCB for AI chip inspection tools
OKI Circuit Technology announced it has developed 124-layer printed circuit board technology for wafer inspection equipment used with next-generation high bandwidth memory (HBM) found in AI semiconductors, a roughly 15% increase over its previous 108-layer design. The company says it achieved this within the existing 7.6mm thickness limit by creating ultra-thin materials, handling tools, and a proprietary automated transport system. OTC aims to establish mass production of the technology by October 2025 at its Joetsu Plant in Niigata Prefecture.
GoKawiil's interpretation of the reporting above, not reported fact.
Denser, higher-layer PCBs allow inspection equipment to keep pace with increasingly complex stacked-DRAM memory chips like HBM, which are critical bottlenecks in AI semiconductor performance. Achieving more layers without increasing board thickness suggests a manufacturing advance that could help semiconductor testing equipment makers handle next-generation chip designs sooner. If successfully scaled to mass production, this could position OKI Circuit Technology as a key supplier in the AI hardware supply chain's inspection and testing segment.
- OKI Circuit Technology developed 124-layer PCB technology, up from 108 layers, for AI chip wafer inspection equipment.
- The advance targets next-generation HBM memory used in AI semiconductors, which demands higher precision and density.
- Mass production is targeted for October 2025 at OTC's Joetsu Plant in Niigata Prefecture.
Source: oki.com, 2026-10-01
Published there as: “OKI Develops 124-Layer PCB Technology”
Read the original report → The summary and analysis above are GoKawiil's own, written from reporting by the source above. Facts and quotes belong to the original publisher.