Georgia Tech spinout Nagare Labs unveils Z2RAM memory cell for AI chip stacking
Nagare Labs, a Georgia Tech spinout backed by Pat Gelsinger, has detailed a new memory cell called Z2RAM that it says combines SRAM-level speed with DRAM-level density, intended to sit directly atop AI chips. According to the founders' published research, the cell retained data for over 300 seconds at 85°C, and a first generation is projected to deliver 5x SRAM density, 14x DRAM speed, and 3x lower read energy than SRAM using six stacked layers.
GoKawiil's interpretation of the reporting above, not reported fact.
The claim addresses a real bottleneck: AI chips need growing memory bandwidth, but high-bandwidth memory yields are constrained and heat limits how many layers can be stacked on processors, as seen with Samsung's zHBM and Micron's vHBM thermal workarounds. If Nagare Labs' lab results hold up at scale, the technology could offer a denser, cooler-running alternative to existing stacked-memory approaches, though it remains early-stage research rather than a shipping product.
- Z2RAM is a two-transistor, capacitor-less memory cell designed for stacking directly on AI chip logic.
- Projected gen-1 specs claim 5x SRAM density, 14x DRAM speed, and 3x lower read energy versus SRAM.
- The approach targets a widening gap between compute growth (70%/year) and memory bandwidth growth (20%/year), per the company.
Source: tomshardware.com — Shane Downing, 2026-11-06
Published there as: “Gelsinger-backed Nagare Labs’ Z2RAM promises SRAM speed at DRAM density”
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