Cognichip details AI models aimed at cutting chip design from months to days
Cognichip, which launched its Artificial Chip Intelligence (ACI) models in September, described in an interview how the system combines specialized AI models, agentic workflows and project memory to automate chip design tasks. Chief Product Officer Stelios Diamantidis said the company has surpassed ten million training samples, many generated via proprietary synthetic data techniques, and built new model architectures and training pipelines to use them. ACI Enterprise, the deployable platform, is designed to analyze specifications, generate and verify RTL, and optimize designs toward power, performance and area targets.
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If Cognichip's claims hold up, automating labor-intensive design steps could meaningfully shorten chip development cycles, which currently stretch across months and involve significant manual engineering effort. This positions Cognichip alongside other EDA players exploring AI-assisted design, though the described capabilities rely on the company's own characterization of its training data and results rather than independent verification. The emphasis on synthetic data generation suggests a strategy for overcoming the scarcity of real-world chip design datasets.
- Cognichip's ACI models reportedly use over ten million training samples, including synthetic data generated with proprietary techniques.
- ACI Enterprise combines these models with agentic workflows and compute infrastructure to automate chip design and verification steps.
- The company says its approach can accelerate chip design timelines from months to days by targeting power, performance and area goals.
Source: tomshardware.com — Anton Shilov, 2026-11-11
Published there as: “Cognichip reveals how its new AI-assisted program can slash chip design times from months to days — automating labor-intensive tasks cuts design time down, Chief Product Officer explains”
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