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Chip Design

5 GoKawiil briefs on this topic

AI tools take on larger roles in chip design at Cadence, Synopsys, Siemens EDA

EDA vendors including Cadence, Synopsys, and Siemens EDA, along with simulation software maker Ansys, began rolling out AI-enhanced design tools in the early 2020s using machine learning and reinforcement learning to optimize floorplans, placement, routing, and verification. Architect Labs recently said it produced a chip design developed almost entirely by AI, which the report calls an industry first, while generative AI increasingly assists engineers writing RTL code and emerging agentic systems can run EDA tools with less human oversight.

Synopsys unveils AgentEngineer AI agents for chip design on new Autopilot Platform

Synopsys introduced AgentEngineer, a set of AI agents built on its Autopilot Platform aimed at automating chip design tasks across six areas including verification, implementation, and analog/mixed-signal design. The company says over 50 customer engagements are underway and plans general availability by the end of 2026, following earlier agentic AI demonstrations with Nvidia and Microsoft at DAC in July.

Tom's Hardware opens AI Chip Design Week coverage free through Oct 2

Tom's Hardware is offering free access to its Premium AI Chip Design Week coverage from September 28 to October 2, available to anyone who creates a free account. The lineup includes an interview with OpenAI hardware lead Richard Ho about Jalapeño, the company's AI-designed inference ASIC unveiled at Hot Chips 2026, plus reports on AI's role in EDA tools and future AI-assisted chip design.

OpenAI details how its LLMs sped up design of Jalapeño AI chip

OpenAI has fully unveiled Jalapeño, its first AI accelerator chip, boasting up to 13.4 petaflops of 4-bit compute and 232GB of high-speed memory. The company says benchmarks show up to 3.6x lower latency than Nvidia's GB300 at lower power, and that the chip went from concept to silicon in under 20 months using its own large language models to accelerate design work with a team of fewer than 100 engineers.

Vaire Computing develops chip resonator that recovers wasted energy

Startup Vaire Computing, led by founder Earley, has built a chip featuring a patent-pending resonator that reclaims energy typically lost as heat during computation. Last year the company demonstrated a version that recovered more energy than it consumed, even after accounting for the power needed to run the component itself, marking an early proof of concept for a decades-old theoretical idea called reversible computing.