GoKawiil
Tech News
OpenAI and Synopsys announced a multi-year strategic partnership to jointly develop GPT-Synopsys, a specialized AI model built to operate Synopsys' electronic design automation tools for semiconductor workflows. The deal includes OpenAI licensing Synopsys' EDA tools, shared R&D, a revenue-sharing arrangement, and joint go-to-market plans to sell the model to customers globally.
Tom's Hardware is hosting a themed editorial event called AI Chip Design Week, running from September 28 to October 2, featuring free premium reporting on AI's role in chip design and electronic design automation (EDA). The coverage includes interviews with OpenAI and other analysis pieces on the state of AI within the chip design industry.
Cadence, Synopsys and Siemens EDA each announced upgraded AI agents for chip design in 2026, with Cadence claiming 'bounded Level 5' autonomy for its ChipStack agent and Synopsys claiming L5 capabilities for its AgentEngineer long-horizon agents. Siemens added 'self-verifying' loops to its Fuse EDA agent, while rival Empyrean's chairman said its tool cut a layout task from four weeks to one. Most performance figures come from the vendors themselves or their customers, often with 'up to' or 'early evaluation' qualifiers, and only AMD has publicly endorsed Synopsys's results without independent analysis.
EDA vendors including Cadence, Synopsys, and Siemens EDA, along with simulation software maker Ansys, began rolling out AI-enhanced design tools in the early 2020s using machine learning and reinforcement learning to optimize floorplans, placement, routing, and verification. Architect Labs recently said it produced a chip design developed almost entirely by AI, which the report calls an industry first, while generative AI increasingly assists engineers writing RTL code and emerging agentic systems can run EDA tools with less human oversight.