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Hybrid Bonding

3 GoKawiil briefs on this topic

CXMT to launch first 4F² DRAM as server DDR5 RDIMM by year-end

CXMT president Cao Kanyu said the Chinese memory maker plans to ship its first 4F²-based product, a server DDR5 RDIMM, before year-end, though speeds and capacities remain unannounced. The chip uses a denser vertical-transistor cell layout, called Vertical Surrounded Gate, that shrinks cell area roughly one-third versus current 6F² designs, and CXMT says it holds over 300 patent families related to the technology.

Nanya-backed PieceMakers debuts on Taiwan exchange, targets AI inference memory niche

PieceMakers, a DRAM designer majority-owned by Nanya Technology, began trading on Taiwan's Emerging Stock Board at a NT$740 reference price and closed its first session up 23.6% at NT$915, valuing the company near $1.4 billion. Rather than competing in HBM, the firm is pursuing custom memory designs that bond DRAM directly to processors via hybrid bonding, positioning the technology between SRAM-only chips like Nvidia's Groq LPU and traditional HBM for AI inference workloads.

SK hynix delays hybrid bonding for HBM until HBM5, cites 775-micron package limit

At Hot Chips 2026, SK hynix's Jaesik Lee said hybrid bonding won't be ready in time for HBM4E and will instead debut with HBM5, as current HBM4 packages are already constrained by a 775-micron thickness ceiling matching standard logic wafers. To keep scaling within that limit, 16-Hi HBM4 stacks now use dies thinned to about 50 microns with half the interlayer gap of 12-Hi designs, while SK hynix continues using its existing MR-MUF bonding method through upcoming Nvidia Rubin-generation products.