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Developer TheAlexKid777 demonstrated the OpenLara open-source Tomb Raider engine running on Espressif's ESP32-P4, a sub-$25 dev board with a dual-core 400MHz RISC-V chip. The game renders at 320x240 and is hardware-scaled up to 1,024x600 with stereo audio, all while the board draws only about 1 watt at peak.
A developer released a browser-hosted IDE that supports writing and running assembly programs for four architectures: M68K, MIPS, RISC-V and Z80. The tool includes a virtual screen and terminal, letting programs draw graphics, read mouse and keyboard input, or handle standard text input and output.
A new open-source repository accompanies a technical blog post detailing how to build a rv32ima instruction-set emulator and run a minimal Linux system on it from the ground up. The project includes emulator code, a small set of emulated devices, machine configuration files, and WebAssembly-exposed functions, along with the Linux build configs needed to reproduce the setup.
A developer documented the process of bringing up the Linux kernel on a new platform by writing a lightweight emulator for a RISC-V CPU rather than using real hardware. The emulator, built in roughly 2000 lines of C++ and implementing the RV32IMA instruction set, provides just enough hardware simulation—MMU support, RAM, an SBI interface, a system timer, and a WD8250-based UART—for Linux to boot. The full source is published on GitHub under WerWolv/riscv-emulator.
Fomu is a tiny programmable device that plugs directly into a USB-A port, combining an FPGA chip, four touch pads, and an RGB LED in a compact plastic case. It ships with enough RAM and storage to run Python natively, while also supporting a RISC-V softcore and other softcores like LM32 and OpenRISC, all programmable through a fully open-source toolchain without accounts, NDAs, or heavy installers.
XCENA partnered with Samsung to build the MX1, a CXL 3.2 device that can expand host memory by up to 2TB of DDR5 while also connecting SSDs and performing on-board computation. The chip, made on Samsung's 4nm process, packs 3072 small RISC-V cores organized into 24 independently schedulable subsystems, alongside two Arm Cortex A53 cores for control, and draws about 40W on the chip and 90W for the full board with DIMMs.
SiFive unveiled the BigSky SF-2U870, a 2U rack server built around 32 of its P870-D cores running at 2.2GHz, paired with 256GB of DDR5-5600 memory and 64 lanes of PCIe 5.0. The system supports double-wide GPUs up to 450W, includes networking and storage options, and is compliant with the RVA23 profile, enabling it to run Ubuntu 26.04 without modification.
Nvidia is working to extend CUDA compatibility beyond x86-64 and aarch64 to RISC-V CPUs, according to a Hot Chips 2026 presentation. The company laid out strict hardware requirements, including RVA23 compliance, adherence to RISC-V server SoC and platform specs, ACPI support, and PCIe coherency, to ensure CUDA runs efficiently rather than falling back on lowest-common-denominator code.