AMD's Zen 6 EPYC 'Venice' chips tested ahead of launch, show major gains over Zen 5
AMD's upcoming EPYC 'Venice' server processors, the first to use the Zen 6 architecture, have been benchmarked ahead of release. Built on TSMC's N2P node, Zen 6 introduces a redesigned vector engine with native FP16 support, split integer schedulers, dual I/O dies enabling 16 memory channels, and larger core-dense CCDs scaling up to 32 cores with quadrupled L3 cache. In testing, a 256-core, 1,024-thread EPYC 9996 outperformed the previous-generation 768-thread EPYC 9965 by 93% in SPEC CPU 2026 benchmarks.