TSMC to adopt High-NA EUV lithography for volume production in 2030
TSMC has confirmed plans to bring High-NA EUV lithography, using 0.55 numerical aperture optics, into high-volume manufacturing by 2030, likely for its A10 or A11 nodes. The company plans to use standard 6x6-inch photomasks initially, followed by a pilot line for larger 6x12-inch photomasks in 2031, aiming for full production with those masks by 2033.
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High-NA EUV promises finer resolution needed for increasingly complex transistor designs like gate-all-around and CFET architectures, but its smaller exposure field creates tradeoffs for large chip designs such as AI accelerators. TSMC's phased rollout signals how the industry will balance cost, complexity, and manufacturing throughput as Moore's Law scaling grows harder.
- TSMC will begin high-volume use of High-NA EUV lithography in 2030, likely for A10/A11 nodes.
- A transition to larger 6x12-inch photomasks is planned for 2031-2033 to address exposure field limitations.
- The move reflects the industry's ongoing struggle to balance resolution gains with productivity and die-size challenges for advanced chips.
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Published there as: “TSMC to start using High-NA EUV lithography in 2030 — A10 or A11 technology prime candidates for use”
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