GoKawiilMicron outlines wafer bonding, High-NA EUV roadmap for future DRAM nodes
Micron has dropped 4F2 memory cells from its roadmap and instead plans to introduce wafer bonding starting with its 1ε DRAM process, following the 1δ node due for volume production in late 2027. For later nodes, codenamed zeta angstrom and eta angstrom, Micron says it will adopt High-NA EUV lithography and new materials to keep shrinking DRAM cells. CTO Scott DeBoer said the company is also developing 3D DRAM alongside new memory types like vertical HBM and vertical edge inference memory for direct integration atop processors.
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The shift suggests Micron sees conventional DRAM scaling approaching physical limits, pushing it toward costlier manufacturing techniques to stay competitive with rivals targeting smaller transistors by decade's end. Adopting High-NA EUV and wafer bonding could raise production costs significantly, which may affect memory pricing as AI demand strains supply. The emphasis on AI-optimized memory like vHBM and vEIM indicates Micron is positioning its roadmap around processor-integrated memory for AI workloads rather than traditional DRAM scaling alone.
- Micron dropped 4F2 cell design and will use wafer bonding starting with its 1ε DRAM node.
- 1δ DRAM, entering production in late 2027, targets a mid-20% bit density gain and AI memory products like HBM5.
- Future nodes zeta angstrom and eta angstrom will rely on High-NA EUV lithography and new materials to keep scaling DRAM.
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Published there as: “Micron plans to use wafer bonding and High-NA EUV for next-gen DRAM”
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