A chip-design puzzle published in August challenged readers to reverse-engineer a small chip's function from only its raw GDS layout, with no netlist or signal names provided. The organizers have now revealed the chip validates solutions to an 11x11 'Two Not Touch' Star Battle puzzle, using row, column and region counters plus a delay line to prevent adjacent stars, and an LFSR-obfuscated ROM to reveal the solution text once all checks pass.
blog.janestreet.com
· 2026-10-02
OpenAI is deploying its new Jalapeño AI chip in racks alongside AMD's EPYC Turin CPUs, each configured with 1.5TB of memory, rather than Nvidia's newer Vera processor. Richard Ho, OpenAI's VP and Head of Hardware, told Tom's Hardware that Turin was chosen for pragmatic reasons, calling Vera 'a little bit behind' in maturity and noting partners already had experience with AMD's chip.
tomshardware.com
· 2026-10-02
OpenAI head of hardware Richard Ho said the company's Jalapeño ASIC went from initial RTL design to tapeout in roughly nine months, with total concept-to-reveal time under two years. Ho said the chip was built from scratch using OpenAI's own internal AI models, including its Codex coding platform, alongside standard EDA tools, and that other engineering teams have been asking how OpenAI achieved the pace.
tomshardware.com
· 2026-09-30
OpenAI's Head of Hardware Richard Ho told Tom's Hardware that the company's new Jalapeño inference ASIC, developed with Broadcom, is designed primarily to meet OpenAI's own growing compute demand. Ho said the chip 'could' be used by others eventually, but that satisfying OpenAI's internal needs remains the priority for the foreseeable future. At Hot Chips 2026, OpenAI shared benchmarks showing Jalapeño running GPT-OSS, DeepSeek R1 and Kimi K2.5 against Nvidia's GB200 and GB300 accelerators.
tomshardware.com
· 2026-09-28
Tom's Hardware is offering free access to its Premium AI Chip Design Week coverage from September 28 to October 2, available to anyone who creates a free account. The lineup includes an interview with OpenAI hardware lead Richard Ho about Jalapeño, the company's AI-designed inference ASIC unveiled at Hot Chips 2026, plus reports on AI's role in EDA tools and future AI-assisted chip design.
tomshardware.com
· 2026-09-28
OpenAI's VP of Hardware, Richard Ho, spoke with Tom's Hardware following the August 2026 Hot Chips reveal of the company's Jalapeño inference ASIC. Ho said the chip's development leaned heavily on AI tools to compress the design timeline, and that efficiency, not raw performance, was the primary driver behind building custom silicon.
tomshardware.com
· 2026-09-28
Zettascale, a YC S24 startup, is recruiting ASIC and FPGA engineers to design custom chips aimed at advancing artificial superintelligence hardware. The company's careers page invites applicants without a specific listed role to send a demo of prior work to its hiring email for consideration.
zscc.ai
· 2026-09-17
Jane Street released a puzzle challenging participants to reverse engineer an ASIC chip from just two files: a GDS layout file and a VCD file with example inputs and outputs. Kjartan van Driel and Leander Post worked through the challenge, breaking down how the chip's physical layout, organized into layers and reusable cells representing logic gates, could be decoded to understand its function without access to the original Verilog design.
kjartanvandriel.github.io
· 2026-09-07
A blogger with an engineering background details how they spent about a month reverse-engineering an ASIC chip design as part of a public puzzle set by trading firm Jane Street. The challenge involved analyzing a GDS chip-layout file to determine the chip's function, first through an easier warmup version with more design information, then a harder unaided version. The author has published their code on GitHub and plans follow-up posts explaining each technical step in more depth.
jestoph.com
· 2026-09-04
Waymo disclosed it built a proprietary 5-nanometer ASIC chip that pre-processes the massive stream of sensor data—including feeds from 13 cameras—before it reaches its self-driving system's core computer. The company says the chip delivers more than 1,000 TOPS of processing power, putting it near the performance level of Nvidia's DRIVE AGX Thor chip, and is a key part of the vehicle now rolling out to all riders in Los Angeles, Phoenix and San Francisco.
techcrunch.com
· 2026-08-23
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